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<div class="header">
  <div class="headertitle"><div class="title">__SPI_HandleTypeDef Struct Reference<div class="ingroups"><a class="el" href="group___s_t_m32_h7xx___h_a_l___driver.html">STM32H7xx_HAL_Driver</a> &raquo; <a class="el" href="group___s_p_i.html">SPI</a> &raquo; <a class="el" href="group___s_p_i___exported___types.html">SPI Exported Types</a></div></div></div>
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<p>SPI handle Structure definition.  
 <a href="#details">More...</a></p>

<p><code>#include &lt;<a class="el" href="stm32h7xx__hal__spi_8h_source.html">stm32h7xx_hal_spi.h</a>&gt;</code></p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 id="header-pub-attribs" class="groupheader"><a id="pub-attribs" name="pub-attribs"></a>
Public Attributes</h2></td></tr>
<tr class="memitem:a97e276bfd322a6028cbac7408cf8e610" id="r_a97e276bfd322a6028cbac7408cf8e610"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a97e276bfd322a6028cbac7408cf8e610">Instance</a></td></tr>
<tr class="memitem:a4b43d4d72f571b7d2162a2d171bb1312" id="r_a4b43d4d72f571b7d2162a2d171bb1312"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_s_p_i___init_type_def.html">SPI_InitTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a4b43d4d72f571b7d2162a2d171bb1312">Init</a></td></tr>
<tr class="memitem:aacb6c3c55011b1b4d2a2ee1b4c012984" id="r_aacb6c3c55011b1b4d2a2ee1b4c012984"><td class="memItemLeft" align="right" valign="top">const uint8_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#aacb6c3c55011b1b4d2a2ee1b4c012984">pTxBuffPtr</a></td></tr>
<tr class="memitem:a5617a3a7983aedb0d214f318062ebc48" id="r_a5617a3a7983aedb0d214f318062ebc48"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a5617a3a7983aedb0d214f318062ebc48">TxXferSize</a></td></tr>
<tr class="memitem:a186b770dda2e53c4e9a204cd50e17e74" id="r_a186b770dda2e53c4e9a204cd50e17e74"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a186b770dda2e53c4e9a204cd50e17e74">TxXferCount</a></td></tr>
<tr class="memitem:aa770b67ee3966c0aa7409f64b3b99bd8" id="r_aa770b67ee3966c0aa7409f64b3b99bd8"><td class="memItemLeft" align="right" valign="top">uint8_t *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#aa770b67ee3966c0aa7409f64b3b99bd8">pRxBuffPtr</a></td></tr>
<tr class="memitem:ab274a4c2de5e95145d45fe80a289f535" id="r_ab274a4c2de5e95145d45fe80a289f535"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ab274a4c2de5e95145d45fe80a289f535">RxXferSize</a></td></tr>
<tr class="memitem:a67e721440b3449d544a27cfd7726c920" id="r_a67e721440b3449d544a27cfd7726c920"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a67e721440b3449d544a27cfd7726c920">RxXferCount</a></td></tr>
<tr class="memitem:abef898bf323d7e9d693665f12b6f6239" id="r_abef898bf323d7e9d693665f12b6f6239"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#abef898bf323d7e9d693665f12b6f6239">CRCSize</a></td></tr>
<tr class="memitem:a599045b20d284f94e5a367a85cad9f39" id="r_a599045b20d284f94e5a367a85cad9f39"><td class="memItemLeft" align="right" valign="top">void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a599045b20d284f94e5a367a85cad9f39">RxISR</a> )(struct <a class="el" href="struct_____s_p_i___handle_type_def.html">__SPI_HandleTypeDef</a> *hspi)</td></tr>
<tr class="memitem:a4446bdc11698f861edf37b72cf437aeb" id="r_a4446bdc11698f861edf37b72cf437aeb"><td class="memItemLeft" align="right" valign="top">void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a4446bdc11698f861edf37b72cf437aeb">TxISR</a> )(struct <a class="el" href="struct_____s_p_i___handle_type_def.html">__SPI_HandleTypeDef</a> *hspi)</td></tr>
<tr class="memitem:aa311e9419f520aee2d2fa30668ce485c" id="r_aa311e9419f520aee2d2fa30668ce485c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#aa311e9419f520aee2d2fa30668ce485c">hdmatx</a></td></tr>
<tr class="memitem:a0876a1b344524bbdbd984be1c3b07a10" id="r_a0876a1b344524bbdbd984be1c3b07a10"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#a0876a1b344524bbdbd984be1c3b07a10">hdmarx</a></td></tr>
<tr class="memitem:aa13d993a0b9b0ea6a07e5a77eeaf394e" id="r_aa13d993a0b9b0ea6a07e5a77eeaf394e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="stm32h7xx__hal__def_8h.html#ab367482e943333a1299294eadaad284b">HAL_LockTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#aa13d993a0b9b0ea6a07e5a77eeaf394e">Lock</a></td></tr>
<tr class="memitem:aa3e13040cc9ea19050d21818bccd49c9" id="r_aa3e13040cc9ea19050d21818bccd49c9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___s_p_i___exported___types.html#ga8891cb64e76198a860172d94c638c9b4">HAL_SPI_StateTypeDef</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#aa3e13040cc9ea19050d21818bccd49c9">State</a></td></tr>
<tr class="memitem:ab2497f2e3cfae59376db75da3bda7ffe" id="r_ab2497f2e3cfae59376db75da3bda7ffe"><td class="memItemLeft" align="right" valign="top"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="#ab2497f2e3cfae59376db75da3bda7ffe">ErrorCode</a></td></tr>
</table>
<a name="details" id="details"></a><h2 id="header-details" class="groupheader">Detailed Description</h2>
<div class="textblock"><p>SPI handle Structure definition. </p>
</div><a name="doc-variable-members" id="doc-variable-members"></a><h2 id="header-doc-variable-members" class="groupheader">Member Data Documentation</h2>
<a id="abef898bf323d7e9d693665f12b6f6239" name="abef898bf323d7e9d693665f12b6f6239"></a>
<h2 class="memtitle"><span class="permalink"><a href="#abef898bf323d7e9d693665f12b6f6239">&#9670;&#160;</a></span>CRCSize</h2>

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          <td class="memname">uint32_t __SPI_HandleTypeDef::CRCSize</td>
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<p>SPI CRC size used for the transfer </p>

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<a id="ab2497f2e3cfae59376db75da3bda7ffe" name="ab2497f2e3cfae59376db75da3bda7ffe"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab2497f2e3cfae59376db75da3bda7ffe">&#9670;&#160;</a></span>ErrorCode</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint32_t __SPI_HandleTypeDef::ErrorCode</td>
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<p>SPI Error code </p>

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<a id="a0876a1b344524bbdbd984be1c3b07a10" name="a0876a1b344524bbdbd984be1c3b07a10"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a0876a1b344524bbdbd984be1c3b07a10">&#9670;&#160;</a></span>hdmarx</h2>

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          <td class="memname"><a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a>* __SPI_HandleTypeDef::hdmarx</td>
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<p>SPI Rx DMA Handle parameters </p>

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<a id="aa311e9419f520aee2d2fa30668ce485c" name="aa311e9419f520aee2d2fa30668ce485c"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa311e9419f520aee2d2fa30668ce485c">&#9670;&#160;</a></span>hdmatx</h2>

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          <td class="memname"><a class="el" href="group___d_m_a___exported___types.html#ga41b754a906b86bce54dc79938970138b">DMA_HandleTypeDef</a>* __SPI_HandleTypeDef::hdmatx</td>
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<p>SPI Tx DMA Handle parameters </p>

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<a id="a4b43d4d72f571b7d2162a2d171bb1312" name="a4b43d4d72f571b7d2162a2d171bb1312"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a4b43d4d72f571b7d2162a2d171bb1312">&#9670;&#160;</a></span>Init</h2>

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          <td class="memname"><a class="el" href="struct_s_p_i___init_type_def.html">SPI_InitTypeDef</a> __SPI_HandleTypeDef::Init</td>
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<p>SPI communication parameters </p>

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<a id="a97e276bfd322a6028cbac7408cf8e610" name="a97e276bfd322a6028cbac7408cf8e610"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a97e276bfd322a6028cbac7408cf8e610">&#9670;&#160;</a></span>Instance</h2>

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          <td class="memname"><a class="el" href="struct_s_p_i___type_def.html">SPI_TypeDef</a>* __SPI_HandleTypeDef::Instance</td>
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<p>SPI registers base address </p>

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<a id="aa13d993a0b9b0ea6a07e5a77eeaf394e" name="aa13d993a0b9b0ea6a07e5a77eeaf394e"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa13d993a0b9b0ea6a07e5a77eeaf394e">&#9670;&#160;</a></span>Lock</h2>

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          <td class="memname"><a class="el" href="stm32h7xx__hal__def_8h.html#ab367482e943333a1299294eadaad284b">HAL_LockTypeDef</a> __SPI_HandleTypeDef::Lock</td>
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<p>Locking object </p>

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<a id="aa770b67ee3966c0aa7409f64b3b99bd8" name="aa770b67ee3966c0aa7409f64b3b99bd8"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa770b67ee3966c0aa7409f64b3b99bd8">&#9670;&#160;</a></span>pRxBuffPtr</h2>

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          <td class="memname">uint8_t* __SPI_HandleTypeDef::pRxBuffPtr</td>
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<p>Pointer to SPI Rx transfer Buffer </p>

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<a id="aacb6c3c55011b1b4d2a2ee1b4c012984" name="aacb6c3c55011b1b4d2a2ee1b4c012984"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aacb6c3c55011b1b4d2a2ee1b4c012984">&#9670;&#160;</a></span>pTxBuffPtr</h2>

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          <td class="memname">const uint8_t* __SPI_HandleTypeDef::pTxBuffPtr</td>
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<p>Pointer to SPI Tx transfer Buffer </p>

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<a id="a599045b20d284f94e5a367a85cad9f39" name="a599045b20d284f94e5a367a85cad9f39"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a599045b20d284f94e5a367a85cad9f39">&#9670;&#160;</a></span>RxISR</h2>

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          <td class="memname">void(* __SPI_HandleTypeDef::RxISR) (struct <a class="el" href="struct_____s_p_i___handle_type_def.html">__SPI_HandleTypeDef</a> *hspi)</td>
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<p>function pointer on Rx ISR </p>

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<a id="a67e721440b3449d544a27cfd7726c920" name="a67e721440b3449d544a27cfd7726c920"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a67e721440b3449d544a27cfd7726c920">&#9670;&#160;</a></span>RxXferCount</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t __SPI_HandleTypeDef::RxXferCount</td>
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<p>SPI Rx Transfer Counter </p>

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<a id="ab274a4c2de5e95145d45fe80a289f535" name="ab274a4c2de5e95145d45fe80a289f535"></a>
<h2 class="memtitle"><span class="permalink"><a href="#ab274a4c2de5e95145d45fe80a289f535">&#9670;&#160;</a></span>RxXferSize</h2>

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<p>SPI Rx Transfer size </p>

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<a id="aa3e13040cc9ea19050d21818bccd49c9" name="aa3e13040cc9ea19050d21818bccd49c9"></a>
<h2 class="memtitle"><span class="permalink"><a href="#aa3e13040cc9ea19050d21818bccd49c9">&#9670;&#160;</a></span>State</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> <a class="el" href="group___s_p_i___exported___types.html#ga8891cb64e76198a860172d94c638c9b4">HAL_SPI_StateTypeDef</a> __SPI_HandleTypeDef::State</td>
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<p>SPI communication state </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a4446bdc11698f861edf37b72cf437aeb">&#9670;&#160;</a></span>TxISR</h2>

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          <td class="memname">void(* __SPI_HandleTypeDef::TxISR) (struct <a class="el" href="struct_____s_p_i___handle_type_def.html">__SPI_HandleTypeDef</a> *hspi)</td>
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<p>function pointer on Tx ISR </p>

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<h2 class="memtitle"><span class="permalink"><a href="#a186b770dda2e53c4e9a204cd50e17e74">&#9670;&#160;</a></span>TxXferCount</h2>

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          <td class="memname"><a class="el" href="core__armv81mml_8h.html#aec43007d9998a0a0e01faede4133d6be">__IO</a> uint16_t __SPI_HandleTypeDef::TxXferCount</td>
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<p>SPI Tx Transfer Counter </p>

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<a id="a5617a3a7983aedb0d214f318062ebc48" name="a5617a3a7983aedb0d214f318062ebc48"></a>
<h2 class="memtitle"><span class="permalink"><a href="#a5617a3a7983aedb0d214f318062ebc48">&#9670;&#160;</a></span>TxXferSize</h2>

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<p>SPI Tx Transfer size </p>

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<hr/>The documentation for this struct was generated from the following file:<ul>
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